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  copyright@ d&i semiconductor co., ltd., korea . all rights reserved absolute maximum ratings symbol parameter value units v dss drain to source voltage 60 v i d continuous drain current(@t c = 25 c) 50 a continuous drain current(@t c = 100 c) 38 a i dm drain current pulsed (note 1) 200 a v gs gate to source voltage 25 v e as single pulsed avalanche energy (note 2) 642 mj e ar repetitive avalanche energy (note 1) 12 mj dv/dt peak diode recovery dv/dt (note 3) 7.0 v/ns p d total power dissipation(@t c = 25 c) 120 w derating factor above 25 c 0.8 w/c t stg, t j operating junction temperature & storage temperature - 55 ~ 175 c t l maximum lead temperature for soldering purpose, 1/8 from case for 5 seconds. 300 c thermal characteristics symbol parameter value units min. typ. max. r jc thermal resistance, junction-to-case - - 1.25 c/w r cs thermal resistance, case to sink - 0.5 - c/w r ja thermal resistance, junction-to-ambient - - 62.5 c/w DFP50N06 may, 2005. rev.1. 1/7 features r ds(on) (max 0.022 ? )@v gs =10v gate charge (typical 36nc) improved dv/dt capability high ruggedness 100% avalanche tested general description this n-channel enhancement mode field-effect power transistor using di semiconductor?s advanc ed planar stripe, dmos technol- ogy intended for battery operated systems like a dc-dc converter motor control , ups ,audio amplifier. also, especially designed to mi nimize rds(on) , low gate charge and high rugged avalanche characteristics. n-channel mosfet to-220 1 2 3 r ds(on) = 0.022 ohm i d = 50a bv dss = 60v 1.gate 2.drain 3.source
copyright@ d&i semiconductor co., ltd., korea . all rights reserved electrical characteristics ( t c = 25 c unless otherwise noted ) symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0v, i d = 250ua 60 - - v  bv dss /  t j breakdown voltage temperature coefficient i d = 250ua, referenced to 25 c -0.06-v/c i dss drain-source leakage current v ds = 60v, v gs = 0v --1ua v ds = 48v, t c = 125 c --10ua i gss gate-source leakage, forward v gs = 25v, v ds = 0v --100na gate-source leakage, reverse v gs = -25v, v ds = 0v - - -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250ua 2.0 - 4.0 v r ds(on) static drain-source on-state resis- tance v gs =10 v, i d = 25a - 0.017 0.022 ? dynamic characteristics c iss input capacitance v gs =0 v, v ds =25v, f = 1mhz - - 1460 pf c oss output capacitance - -580 c rss reverse transfer capacitance - 90 dynamic characteristics t d(on) turn-on delay time v dd =30v, i d =25a, r g =25 ? ? see fig. 13. (note 4, 5) - 50 - ns t r rise time - 165 - t d(off) turn-off delay time - 78 - t f fall time - 60 - q g total gate charge v ds =160v, v gs =10v, i d =9a ? see fig. 12. (note 4, 5) - 36 45 nc q gs gate-source charge - 8.5 - q gd gate-drain char ge(miller charge) - 12 - source-drain diode ratings and characteristics symbol parameter test conditions min. typ. max. unit. i s continuous source current integral reverse p-n junction diode in the mosfet --50 a i sm pulsed source current - - 200 v sd diode forward voltage i s =50a, v gs =0v - - 1.5 v t rr reverse recovery time i s =50a, v gs =0v, di f /dt=100a/us -95-ns q rr reverse recovery charge - 250 - uc DFP50N06 ? notes 1. repeativity rating : pulse width limited by junction temperature 2. l =300uh, i as = 50a, v dd = 25v, r g = 50 ? , starting t j = 25c 3. i sd ? 50 a, di/dt ? 300a/us, v dd ? bv dss , starting t j = 25c 4. pulse test : pulse width ? 300us, duty cycle ? 2% 5. essentially independent of operating temperature. 2/7
copyright@ d&i semiconductor co., ltd., korea . all rights reserved 246810 10 0 10 1 10 2 note ? v ds = 30 [ v ] 250 k pulse test 25[ ] ? 125[ ] ? -55[ ] ? id[ a ], drain current vgs[ v ], gate-source voltage 3/7 0 5 10 15 20 25 30 35 40 45 0 2 4 6 8 10 12 note ? i d = 50a v ds = 48v v ds = 30v v ds =12v v gs [ v ], gate to source voltage[v] gate charge [nc] 10 -1 10 0 10 1 10 0 10 1 10 2 10 3 note ? 1. 250 k pulse test 2. t c = 25 ? v gs [ v ] top 15 10 8 7 6 5.5 5 bottom 4.5 i d [ a ], drain current v ds [v], drain to source voltage 10 -1 10 0 10 1 0 500 1000 1500 2000 2500 3000 1. c iss = c gs + c gd (c ds = shorted) 2. c oss = c ds + c gd 3. c rss = c gd note ? 1. v gs = 0[v] 2. frequency = 1[mhz] c oss c rss c iss capcitance [ pf ] v ds [ v ], drain to source voltage 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 10 0 10 1 10 2 tj=25 o c tj=175 o c note ? v gs = 0v 250 k pulse test i dr [ a ], reverse drain current vsd[ v ], source-drain voltage 0 50 100 150 200 0 10 20 30 40 50 60 70 note ? t j = 25 ? v gs =20[v] v gs =10[v] r ds(on) [m ? ] drain to source on resistance i d [ a ], drain current fig 3. on resistance variation vs. drain current and gate voltage fig 4. on state current vs. allowable case temperature fig 5. capacitance characteristics fig 6. gate charge characteristics fig 1. on-state characteristics fig 2. transfer characteristics DFP50N06
copyright@ d&i semiconductor co., ltd., korea . all rights reserved DFP50N06 4/7 25 50 75 100 125 150 175 0 10 20 30 40 50 60 i d [ a ], drain current temperature[ ] ? 10 -1 10 0 10 1 10 2 10 0 10 1 10 2 case temp. @ 175 ? junction temp.@ 25 ? single pulse see figure 11. ? operating area limited by r ds(on) 100us 1ms 10ms dc i d [ a ], drain current v ds [ v ], drain to source voltage -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 note ? 1. vgs = 10v 2. id = 25a rds(on),(normalized) drain-source on-resistance tj, junction temperature[ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 note ? 1. v gs = 0v 2. i d = 250 u bv dss [ v ], breakdown voltage temperature [ ] ? fig 8. on resistance variation vs. temperature fig 7. breadown voltage variation vs. temperature fig 9. maximum safe operating area fig 10. maximum drain current vs. case temperature 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 t 1 t 2 p dm 1. z jc (t) = 1.25 /w m ax. ? 2. duty factor, d=t 1 /t 2 3. z jc (t) = (t jm - t c )/p d z jc (t), thermal impedance t 1 [ sec ], s quare w ave p ulse d uration fig 11. transient thermal response curve
copyright@ d&i semiconductor co., ltd., korea . all rights reserved fig 13. switching time test circuit & waveforms fig 14. unclamped inductive switching test circuit & waveforms DFP50N06 fig. 12. gate charge test circuit & waveforms 5/7 12v 200nf 50ko 300nf v gs 1ma same type as dut dut v ds v gs charge q g q gs q gd pulse generator 10v r g v ds r l v dd (0.5 rated v ds ) dut v ds v in 90% 10% t d(on) t r t d(off) t f t on t off time 10v v ds r g v ds (t) dut bv dss l i d v dd i d (t) i as e as =l l i as 2 bv dss bv dss - v dd 1 2 t p
copyright@ d&i semiconductor co., ltd., korea . all rights reserved DFP50N06 dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i s controlled by pulse period v d d l l i s i s fig. 15. peak diode recovery dv/dt test circuit & waveforms 10 v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward volta g e dro p v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- 10 v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward volta g e dro p v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period -------------------------- 6/7
copyright@ d&i semiconductor co., ltd., korea . all rights reserved dim. mm inch min. typ. max. min. typ. max. a 6.12 6.32 6.52 0.241 0.249 0.257 b 9.00 9.20 9.40 0.354 0.362 0.370 c 12.88 13.08 13.28 0.507 0.515 0.523 d 2.70 2.80 2.90 0.106 0.110 0.114 e 1.20 1.30 1.40 0.047 0.051 0.055 f 15.12 15.52 15.92 0.595 0.611 0.627 g 2.70 3.00 3.30 0.106 0.118 0.130 h 4.30 4.50 4.70 0.169 0.177 0.185 i 1.25 1.30 1.40 0.049 0.051 0.055 j 0.45 0.50 0.60 0.018 0.020 0.024 k 2.30 2.40 2.50 0.091 0.094 0.098 l 9.90 0.390 m 1.42 1.52 1.62 0.056 0.060 0.064 n 0.75 0.85 0.95 0.030 0.03 0.037 o 2.44 2.54 2.64 0.096 0.100 0.104 p 4.88 5.08 5.28 0.192 0.200 0.208  3.60 0.142 7/7 DFP50N06 1. gate 2. drain 3. source to-220 package dimension 1. gate 2. drain 3. source


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